Dr. Dasygenis’s primary research focuses on the co-design and co-synthesis of hardware and software for embedded, cyber-physical, and reconfigurable computing systems:

• Embedded Hardware Acceleration: Synthesizable VHDL IP cores, FPGA accelerators, and soft-core integration (MicroBlaze, PicoBlaze, RISC-V).
• Low-Power Custom Memory Hierarchies: High-level algorithmic code transformations and data reuse exploration to minimize off-chip memory bandwidth and power consumption.
• Residue Number System (RNS): Non-conventional arithmetic circuits, high-speed modular adders, multipliers, and forward/reverse converters for DSP and cryptography.
• Autonomous Robotics & Sensor Fusion: Navigation, collision avoidance, and edge perception for ground vehicles and assistive platforms.
• Hardware Security & Trust: Logic locking techniques (ProbLock) and hardware trojan mitigation in third-party IP cores.

Selected competitive research programs where Dr. Dasygenis served as a primary researcher or coordinator:

• AMDREL (IST-2001-34379): Architectures and Methodologies for Dynamic Reconfigurable Logic
  Funded by the European Community in the 5th IST Framework (2002–2005).
• INOS: Intelligent Networked Optical Sensor
  Funded by the European Community in the 6th IST Framework (2005).
• EASY (IST-2000-30093): Energy Aware System on Chip design of the HIPERLAN/2 standard
  Funded by the European Community in the 5th IST Framework (2001–2004).
• PRENED (GSRT): A Methodology for memory management for low power multimedia processors
  Funded by the General Secretariat for Research and Technology (2001–2003).
• PENED (GSRT): Memory management for real-time and low power embedded multimedia systems
  Funded by the General Secretariat for Research and Technology (2000–2001).

Associate Professor
Department of Electrical and Computer Engineering
School of Engineering, University of Western Macedonia, Greece.

Director & Founder: Laboratory of Robotics, Embedded and Integrated Systems (ROBIS Lab).

Visiting Researcher (2002, 2003) in the international research department DESICS at IMEC, collaborating closely with world-renowned researcher Prof. Francky Catthoor on algorithmic memory transformations and low-power memory hierarchy design for multimedia processors.

Head of Technology & Design Center Branch of Thessaloniki and overall IT Manager, overseeing IT infrastructure, industrial automation, enterprise networks, and corporate R&D initiatives.

• TEI of Thessaloniki (2006–2010): Contract Faculty teaching Unix Operating Systems, Microprocessors, and Network Security.
• DUTH ECE Department (2000–2002): Network administrator and IT systems infrastructure engineer.
• Consulting Engineer (2000–2010): Technical security officer and enterprise systems architect (Linux/BSD/SQL/VoIP).