Appendix D. Module Control Signals

87

Table D.2: FPU Control Signals

INSTR

2

1

0

Add.f

0

0

0

Sub.f

0

0

1

Mult.f

0

1

0

div.f

0

1

1

Table D.3: Shifter Control Signals

INSTR

7

6

5

4

3

2

1

0

Pshift.l.2

0

0

0

0

0

0

1

0

Pshift.l.4

0

0

0

0

0

0

0

1

Pshift.l.8

0

0

0

0

0

0

0

0

Pshift.r.2

0

0

0

0

0

1

1

0

Pshift.r.4

0

0

0

0

0

1

0

1

Pshift.r.8

0

0

0

0

0

1

0

0

Pshift.r.a.2

0

0

0

0

1

1

1

0

Pshift.r.a.4

0

0

0

0

1

1

0

1

Pshift.r.a.8

0

0

0

0

1

1

0

0

Pshiftadd.l.1

0

0

1

X

X

0

X

X

Pshiftadd.l.2

0

1

0

X

X

0

X

X

Pshiftadd.l.3

0

1

1

X

X

0

X

X

Pshiftadd.r.1

0

0

1

X

X

1

X

X

Pshiftadd.r.2

0

1

0

X

X

1

X

X

Pshiftadd.r.3

0

1

1

X

X

1

X

X

Pshifti.l.2

0

0

0

1

0

0

1

0

Pshifti.l.4

0

0

0

1

0

0

0

1

Pshifti.l.8

0

0

0

1

0

0

0

0

Pshifti.r.2

0

0

0

1

0

1

1

0

Pshifti.r.4

0

0

0

1

0

1

0

1

Pshifti.r.8

0

0

0

1

0

1

0

0

Pshifti.r.a.2

0

0

0

1

1

1

1

0

Pshifti.r.a.4

0

0

0

1

1

1

0

1

Pshifti.r.a.8

0

0

0

1

1

1

0

0

Shrp

1

0

0

X

X

X

X

X

Slli

1

0

1

X

X

X

X

X

Srai

1

1

0

X

X

X

X

X

Srli

1

1

1

X

X

X

X

X