HDL Generator

This is a web based tool to create synthesizable structural VHDL, according to specific user input in a compact netlist format, called a-HDL.

Note: Anonymous users are allowed maximum 120sec script execution time. For a higher timeout, you can get an authorized code for free; just send me an email

• Instrument a C code with printf for memory accesses
• HDL Generator (input from 3 arrays)
• HDL Generator (input from single JSON file)
• Ripple Carry Adder input generator for HDL
• Multiplier input generator for HDL
• Multivector multiplier
• Constant Multiplier
• HDL FAMA bitstream
• HDL FAMA Accelerator
• Compressor 4:2
• Encoder
• Decoder
• Equation Parser Accelerator
• Sum of Absolute Differences
• Example3: Arbitrary Input Carry Save Adder tree input generator for HDL
• Binary to Residue Number System Converter for a given moduli
• Binary to Residue Number System Converter Multi Modulus
• Magnitude Comparator